1. Field of the Invention
This invention relates to a thin film transistor and a semiconductor device and a method for forming the same, more particularly to a method of producing a silicon thin film transistor for use in an active matrix drive type liquid crystal display, an image sensor, a thermal head, etc., and to a silicon thin film transistor manufactured by the same.
2. Description of Prior Art
A silicon thin film transistor has been hitherto utilized in a liquid crystal display for a compact TV or computer, and an active element or a part of a drive circuit for an image sensor and a thermal head which are used in a facsimile machine, etc. An amorphous silicon thin film transistor is being most vigorously developed now because it can be manufactured relatively easily and designed in a large area.
The amorphous silicon thin film transistor, however, has a demerit that electron and hole mobilities are very small, 1 cm2/Vsec and 0.1 cm2/Vsec respectively. This is not a critical problem, for example when it is used to perform a switching operation of each pixel of a liquid crystal display or each bit of an image sensor, but is a critical problem particularly in a switching speed when a drive circuit is constructed on same substrate.
On the other hand, a polycrystal silicon thin film transistor which has been used for a compact-size liquid crystal TV or an image sensor has electron and hole mobilities of about 10 cm2/Vsec, and some driving circuits comprising polycrystal silicon thin film transistors are actually marketed as a product. However, the polycrystal silicon thin film transistor is also insufficient to satisfy scale-up and speed-up needs of a device. The polycrystal silicon thin film transistor has polycrystal silicon film formed in an active layer by an LPCVD method, for example. Such polycrystal silicon has a high potential barrier at a grain boundary, so that both of electron and hole mobilities are limited to about 10 cm2/Vsec or less. In addition, in most cases, cost is high because of use of expensive quartz as a substrate.
Apart from such amorphous silicon thin film transistor or polycrystal silicon thin film transistor, another method in which amorphous silicon film is formed on a substrate formed of quartz or glass, and then heated for a long time to be grown in solid phase and crystallized has been recently studied. This method provides a thin film transistor having a high mobility of several times to several-tens times of that of a polycrystal silicon thin film transistor (this is dependent on a process condition), and also has high productivity, so that this method is more effective for the next generation""s active matrix drive liquid crystal display having driving circuits formed on the same large substrate, for example.
Since a quartz substrate is durable to high temperature above 1000xc2x0 C., the following advantages are obtained: a gate insulation film formed by thermal oxidation of silicon active layer, which is used generally in silicon wafer process, can be adopted, and a quartz substrate provides a good silicon/silicon-oxide interface. However, the thin film transistor grown in solid phase on the quartz substrate by above method has not only a problem that stable and uniform characteristics cannot be obtained because of lack of uniformity of thermal contraction of quartz, but also a problem that there occurs a failure due to an instability phenomenon that reduction of off resistance and current-curve variation with time lapse are developed, and these problems make it difficult to realize large-area device. In addition, the quartz substrate is more expensive several times than glass, especially for a large-area substrate, so that the quartz would be unsuitable as substrate in this respect.
On the other hand, relatively-low cost glass which is durable to a thermal process of about 600xc2x0 C. at maximum has been recently developed. Some kinds of this glass can be used for a solid-phase thermal growth process below 600xc2x0 C. because they contain a small amount of alkali component. These kinds of glass show a very large coefficient of thermal contraction by heating them at 600xc2x0 C. for 24 hours, for example. Therefore, when a thin film transistor is formed on such a glass substrate, a threshold voltage is observed to be shifted to a positive side by 2 to 5 volt because the substrate is thermally contracted by a heat-treatment in a crystallization process of the semiconductor film, so that a compression stress acts on an active layer of the thin film transistor and the interface condition of the active layer silicon/gate insulator layer is deteriorated.
In addition, since the thermal contraction of the substrate exceeds 200 ppm in a heating process for activating impurities doped in the thin film transistor, a pattern alignment is difficult even using a reduction projecting light exposure device having a mechanism of correcting a substrate expansion and contraction, especially when the diagonal length of the substrate exceeds 10 inches.
An object of this invention is to provide a method for forming on an insulating substrate a crystalline amorphous silicon thin film transistor in which high carrier mobility, low threshold voltage and high off-resistance can be stably obtained.
In order to attain the above and other objects, the method according to this invention is a method for changing a silicon thin film formed on an insulating substrate to a silicon thin film having crystallinity by a thermal process of 550 to 800xc2x0 C. to produce a thin film transistor using a crystalline silicon thin film, wherein thermal contraction of the insulating substrate by the thermal process is controlled to be 30 to 500 ppm (parts per million), preferably 30 to 200 ppm to make film quality of the silicon thin film excellent, thereby stably producing a thin film transistor having high mobility, low threshold voltage and high off-resistance.
According to this invention, on a way of a thin film transistor forming process, a pattern is formed on the insulating substrate and the pattern formed on the insulating substrate is subjected to thermal treatment with thermal contraction of said insulating substrate being controlled to be 100 ppm or less.
In order to restrict the thermal contraction of the substrate to the above range, the insulating substrate is thermally treated at 550 to 800xc2x0 C. before the silicon thin film is formed on the substrate.
By adopting the producing method of the thin film transistor mentioned above, mobilities of electron and hole exceed 80 cm2/Vsec and 50 cm2/Vsec respectively, and the absolute value of a threshold voltage of NMOS and PMOS can be stabilized under 6 volts.
In addition, a thin film transistor in which an off-resistance of 1Gxcexa9 or more could be obtained for |VDS|=5V and VG=0V could be produced without a special structure of transistor.
Further, since thermal contraction of the insulating substrate was suppressed below 100 ppm by the thermal treatment of the insulating substrate in the manner as described above, and thus the patterning can be carried out with a low-price contact-type light exposure device or a proximity light exposure device.
There has been conventionally a technical idea that the thermal contraction should be suppressed to the utmost or that the degree of the thermal contraction of the semiconductor itself is coincident with that of the thermal contraction of the substrate. However, this invention differs from the above conventional technical idea, and has a novel technical idea that a compression stress is applied to the semiconductor film to the extent that characteristics of the semiconductor film are not deteriorated, thereby obtaining a thin film transistor having good semiconductor characteristics, high mobility, low threshold voltage and high off-resistance.
That is, the compression stress is slightly applied to the semiconductor film so that the thermal contraction of the substrate in a crystallization process is controlled to be above 30 ppm, and in order to prevent deterioration of the characteristics of the semiconductor film due to the excessive compression stress, the upper limit of the thermal contraction of the substrate is restricted to 500 ppm or less, preferably below 200 ppm, thereby realizing more excellent film characteristics.
Further, there is a problem in the thin film transistor forming process that if the substrate is contracted in a process after the patterning treatment, an alignment process cannot be carried out in a next process. Therefore, the thermal contraction of the substrate is set 200 ppm or less, preferably 100 ppm or less to perform the alignment process. Especially for the thermal contraction of 100 ppm or less, a contacting light-exposure type and a proximity light exposure type of an alignment device are usable, so that the thin film transistor can be produced with a low-cost device.